Midwest Symposium on Circuits and Systems

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Midwest Symposium on Circuits and Systems Journal

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A Tunable Dead Time, Low Noise, and Robust Front-End Circuit for CMOS SPADs 2025
Approximate DFT Based Fourier Neural Operators for ML-Based PDE Solution at Linear Complexity 2025
Neuromorphic Computing Using Analog-KAN in Standard CMOS Technology 2025
Integrated Analog Computers as Domain-Specific Accelerators: A Tutorial Review 2024
PWM-Based Control Circuit for Fast Heating of Flexible Microheaters 2024
Real-time 5.7 GHz Realization of Multidimensional 2D Hybrid Approximate DFT Spectrum Sensors for RF Situational Awareness 2024
Spoof Surface Plasmon Polariton Based Ultra-Wideband Bandpass Filters 2024
Review of Hardware Implementation of SNN 2023
SPAD Based CMOS Monolithic PPG Sensor 2023
Unsupervised IC Security with Machine Learning for Trojan Detection 2023
Capacitor-Less Memristive Integrate-and-Fire Neuron with Stochastic Behavior 2021
Phased Array Advantages at BAE Systems 2020
Randomized Pulse-Based Encoding for Secure Wireless Data Communications 2020
A Novel Low Loss 3D System-in-Package Approach for 60GHz Antenna on Chip Applications 2020
A Passive STAR Microwave Circuit for 1-3 GHz Self-Interference Cancellation 2020
Single Photon Avalanche Diode based Vision Sensor with On-Chip Memristive Spiking Neuromorphic Processing 2020
Modeling of Silicon Photomultiplier Based on Perimeter Gated Single Photon Avalanche Diode 2019
Supervising Communication SoC for Secure Operation Using Machine Learning 2019
Supervisory Circuits for Low-Frequency Monitoring of a Communication SoC 2019
A CMOS Perimeter Gated SPAD Based mini-Digital Silicon Photomultiplier 2018
Power-Efficient Data Modulation for All-Mechanical ULF/VLF Transmitters 2018
N-port LNAs for mmW array processors using 2-D spatio-temporal Δ - Σ noise-shaping 2017
N-port LNAs for mmW Array Processors using 2-D Spatio-Temporal Δ - Σ Noise-Shaping 2017
Continuous-Time Algorithms for Solving the Electromagnetic Wave Equation in Analog ICs 2017
Design of Adiabatic MTJ-CMOS Hybrid Circuits 2017
Design of a Low-Complexity Wideband Analog True-Time-Delay 5-Beam Array in 65nm CMOS 2017
Low-Complexity N-port ADCs Using 2-D Δ-Σ Noise-Shaping for N-Element Array Receivers 2017
FPGA-based Network-Resonance Applebaum Adaptive Arrays for Directional Spectrum Sensing 2015
6-GHz All-Pass-Filter-Based Delay-And-Sum Beamformer in 130nm CMOS 2014
Combined Time-Delay FIR and 2-D IIR Filters for EARS, Radar, and Imaging Applications 2014
10-GHz Current-Mode 1st- and 2nd-Order Allpass Filters on 130nm CMOS 2013
FFT-Based Phase Compensation of 2-D Beam Digital Filters for Electronically Steerable RF Arrays 2013
High-Voltage Class-D Direct-Drive Audio Amplifier for Electrostatic Loudspeakers 2012
A 2D IIR spatially-bandpass antenna beamformer on a 65 nm Achronix SPD60 asynchronous FPGA 2011
An Architecture For A 7 x 7-bit Multiple-Radix Multiplier Building Block 2011
An Asynchronous Array Architecture for 16 x 1 DCT-4/DST-4 on a 65nm Achronix SPD60 FPGA 2011
Design and FPGA-Implementation of 1^st-Order 4D IIR Frequency-Hyperplanar Digital Filters 2011
Under-decimated 3D FIR Space-Time Cone Filters using DFT Polyphase Filter Banks for Attenuation of Radio Frequency Interference 2011
Systolic-Array Architecture for 2D IIR Wideband Dual-Beam Space-Time Plane-wave Filters 2010
Time-multiplexed systolic-array processors for real-time 2D IIR beam plane-wave filters 2007
Time-multiplexed systolic-array processors for real-time 2D IIR beam plane-wave filters 2007
A Decimal Floating-Point Fused-Multiply-Add Unit 2010

International Standard Serial Number (ISSN)

1548-3746

Electronic International Standard Serial Number (EISSN)

1558-3899