An Architecture For A 7 x 7-bit Multiple-Radix Multiplier Building Block Conference

Edirisuriya, A, Madanayake, A, Adikari, J et al. (2011). An Architecture For A 7 x 7-bit Multiple-Radix Multiplier Building Block .

International Collaboration

cited authors

  • Edirisuriya, A; Madanayake, A; Adikari, J; Dimitrov, VS

authors

date/time interval

  • August 7, 2011 -

publication date

  • January 1, 2011

keywords

  • Computer Science
  • Computer Science, Information Systems
  • Engineering
  • Engineering, Electrical & Electronic
  • Science & Technology
  • Technology

Location

  • SOUTH KOREA, Yonsei Univ, Seoul

Conference

  • 54th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

publisher

  • IEEE