A Tunable Dead Time, Low Noise, and Robust Front-End Circuit for CMOS SPADs
Conference
Irfan, N, Daiyan, KM, Hasan, S et al. (2025). A Tunable Dead Time, Low Noise, and Robust Front-End Circuit for CMOS SPADs
. 681-685. 10.1109/MWSCAS53549.2025.11244321
Irfan, N, Daiyan, KM, Hasan, S et al. (2025). A Tunable Dead Time, Low Noise, and Robust Front-End Circuit for CMOS SPADs
. 681-685. 10.1109/MWSCAS53549.2025.11244321
This paper presents design and comprehensive analysis of a new robust front-end circuitry with tunable dead time and low noise for single photon avalanche diodes (SPADs) implemented in a standard 180 nm CMOS process. Besides accelerating avalanche detection and rapid quenching, the design incorporates a hold-off time and reset time control feature that facilitates the tuning of dead time in order to mitigate the tradeoff between photon detection efficiency (PDE), maximum photon count rate, and afterpulsing effect. We achieved a nominal deadtime of approximately 2.12 ns, with the capability of dead time tuning over a wide range between 1.9 ns and 40 ns, which corresponds to a maximum count rate of 25 Mcps to 526 Mcps. A comprehensive analysis was conducted by thoroughly examining the effects of temperature varying over a wide range from -40°C to 150°C, hold-off capacitors varying from from 2 pF to 24 pF, fabrication process corners, and transistor sizes on dead time. Quenching transition of 47.5 ps at excessive bias voltages of 5 volts, and final reset of 52 ps were achieved.
