A 500-MHz BW Beamforming Chiplet Pair with Analog Approximate-DFT and Dual 10-Gb/s Links
Conference
Mandal, S, John, NS, Hong, FH et al. (2026). A 500-MHz BW Beamforming Chiplet Pair with Analog Approximate-DFT and Dual 10-Gb/s Links
. Midwest Symposium on Circuits and Systems, 484-488. 10.1109/MWSCAS67364.2026.11680805
Mandal, S, John, NS, Hong, FH et al. (2026). A 500-MHz BW Beamforming Chiplet Pair with Analog Approximate-DFT and Dual 10-Gb/s Links
. Midwest Symposium on Circuits and Systems, 484-488. 10.1109/MWSCAS67364.2026.11680805
Wideband sensor arrays require multi-beam beamforming while maintaining low size, weight, and power (SWaP). This paper presents a mixed-signal beamforming chiplet pair that combines analog approximate discrete Fourier transform (a-DFT) processing with high-speed data conversion and a wired digital link. The transmit chiplet accepts eight baseband inputs and performs current-mode 8-point a-DFT beamforming using multiplierless coefficients 0, pm 1, pm 2. The beam currents are converted to voltages and digitized by a 4× time-interleaved 8-bit successive-approximation-register (SAR) ADC at 1.0 GS/s. The digitized beams are serialized and transmitted over dual 10 Gb/s differential links using 8b/10b encoding. A companion receive chiplet performs clock and data recovery (CDR), adaptive equalization, and line decoding. Both chiplets are designed in 28-nm CMOS and support 500 MHz instantaneous bandwidth. Simulations indicate >50 ~dB SNDR across the analog path, 45.7 dB ADC SNDR (7.3 ENOB), and reliable dual 10 Gb/s operation over PCB channels while consuming 197.1 mW total.
