An Asynchronous Array Architecture for 16 x 1 DCT-4/DST-4 on a 65nm Achronix SPD60 FPGA Conference

Madanayake, Arjuna, Mugler, Dale, Rajapaksha, Nilanka. (2011). An Asynchronous Array Architecture for 16 x 1 DCT-4/DST-4 on a 65nm Achronix SPD60 FPGA .

cited authors

  • Madanayake, Arjuna; Mugler, Dale; Rajapaksha, Nilanka

authors

date/time interval

  • August 7, 2011 -

publication date

  • January 1, 2011

keywords

  • ALGORITHMS
  • Computer Science
  • Computer Science, Information Systems
  • Engineering
  • Engineering, Electrical & Electronic
  • Science & Technology
  • Technology

Location

  • SOUTH KOREA, Yonsei Univ, Seoul

Conference

  • 54th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

publisher

  • IEEE