Integrated Analog Computers as Domain-Specific Accelerators: A Tutorial Review Conference

Mandal, Soumyajit, Liang, Jifu, Malavipathirana, Hasantha et al. (2024). Integrated Analog Computers as Domain-Specific Accelerators: A Tutorial Review . 875-881. 10.1109/MWSCAS60917.2024.10658915

cited authors

  • Mandal, Soumyajit; Liang, Jifu; Malavipathirana, Hasantha; Udayanga, Nilan; Silva, Hiruni; Hariharan, S; Madanayake, Arjuna

date/time interval

  • August 11, 2024 -

publication date

  • January 1, 2024

keywords

  • Analog computing
  • CIRCUITS
  • COMPACT MODEL
  • CONTINUOUS-TIME ALGORITHMS
  • DESIGN
  • GENERATION
  • MEMORY
  • MISMATCH
  • NOISE
  • PDE solvers
  • PROCESSOR
  • domain-specific computing
  • hardware acceleration

Location

  • MA, Springfield

Digital Object Identifier (DOI)

International Standard Book Number (ISBN) 13

Conference

  • 67th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

publisher

  • IEEE

start page

  • 875

end page

  • 881