Packaging of multi-core microprocessors: Tradeoffs and potential solutions Conference

Muthana, P, Swaminathan, M, Tummala, R et al. (2005). Packaging of multi-core microprocessors: Tradeoffs and potential solutions . 2 1895-1903.

cited authors

  • Muthana, P; Swaminathan, M; Tummala, R; Sundaram, V; Wan, L; Bhattacharya, SK; Raj, PM

authors

abstract

  • Power consumption and interconnect latency are becoming major bottlenecks in the design of high performance computers and microprocessors. In this paper we propose to use a multi-core processor approach to improve the performance of a processor. This paper discusses an analysis of the performance trade off's between single and multi-core processors based on power, frequency, bandwidth and the role of embedded passives with high density wiring in future packages to support such processors. © 2005 IEEE.

publication date

  • September 19, 2005

start page

  • 1895

end page

  • 1903

volume

  • 2