STACK: Sparse timing of algorithms using computational knowledge Conference

Iyer, V, Iyengar, SS, Murthy, GR et al. (2011). STACK: Sparse timing of algorithms using computational knowledge . 83 LNEE 305-320. 10.1007/978-3-642-17943-3_16

cited authors

  • Iyer, V; Iyengar, SS; Murthy, GR; Srinathan, K; Srinivas, MB; Govindarajulu, R



  • Research in computational aspects and algorithm optimizations help design tools to acceleration the execution of algorithms. Cost and availability of FPGA design boards have driven number of computations per second close to the general-purpose model of CPUs. In this chapter, we study the effects of algorithms with the knowledge of the underlying computing model for getting consistent and coherent view of the sensed data. The computing model uses uniprocessor, multiprocessor and acceleration using pipeline and data-path forwarding with Byzantine fault-tolerance. The pre-processing approach of the modified algorithm for sparse sensing gives better consistency and the application based calibration allowing coherent view of the data and at the same time reduces the total power consumption. This is analogous to the needle in a hay stack. The STACK implementation runs 4 times faster than the normal program based optimizations for static and dynamic scheduling. © 2011 Springer-Verlag Berlin Heidelberg.

publication date

  • February 7, 2011

Digital Object Identifier (DOI)

International Standard Book Number (ISBN) 13

start page

  • 305

end page

  • 320


  • 83 LNEE