Thread-level CPU power measurement for high performance parallel systems: Impact analysis of system control parameters on HPC energy Efficiency
Article
Newsom, DK, Azari, SF, Serres, O et al. (2016). Thread-level CPU power measurement for high performance parallel systems: Impact analysis of system control parameters on HPC energy Efficiency
. International Journal of Computing and Digital Systems, 5(3), 189-209. 10.12785/IJCDS/050301
Newsom, DK, Azari, SF, Serres, O et al. (2016). Thread-level CPU power measurement for high performance parallel systems: Impact analysis of system control parameters on HPC energy Efficiency
. International Journal of Computing and Digital Systems, 5(3), 189-209. 10.12785/IJCDS/050301
Research in high performance computing (HPC) energy optimization is a growing field motivated by cost and environmental drivers. One of the key challenges in reducing program-dependent HPC power consumption is precise measurement of the thread-level CPU (as distinct from other system components) energy use during the initialization and execution phases of a parallel program's execution. In support of our research in Partitioned Global Address Space (PGAS) power optimization we developed a scalable CPU direct measurement framework with its associated reporting and data acquisition components. We utilized this framework to evaluate the execution time and energy consumption impact of our code optimizations. The measurement framework itself and the associated instrumentation is sufficiently scalable to support any program-level energy optimization research in high performance parallel systems.
