Enabling Energy-Efficient Ternary Logic Gates using CNFETs Conference

Tabrizchi, Sepehr, Sharifi, Fazel, Badawy, Abdel-Hameed et al. (2017). Enabling Energy-Efficient Ternary Logic Gates using CNFETs . Proceedings of the IEEE Conference on Nanotechnology, 542-547.

International Collaboration

cited authors

  • Tabrizchi, Sepehr; Sharifi, Fazel; Badawy, Abdel-Hameed; Saifullah, ZM

date/time interval

  • July 25, 2017 -

publication date

  • January 1, 2017

keywords

  • CMOS CIRCUITS
  • CNFET
  • COMPACT SPICE MODEL
  • DESIGN
  • DEVICES
  • DOT CELLULAR-AUTOMATA
  • Energy-Efficiency
  • Engineering
  • Engineering, Electrical & Electronic
  • MOS
  • MULTIPLE-VALUED LOGIC
  • Multiple Valued Logic (MVL)
  • NANOTECHNOLOGY
  • Nanoelectronics
  • Nanoscience & Nanotechnology
  • ROBUST
  • Science & Technology
  • Science & Technology - Other Topics
  • TRANSISTORS INCLUDING NONIDEALITIES
  • Technology
  • Ternary Logic

Location

  • PA, Pittsburgh

International Standard Book Number (ISBN) 13

Conference

  • 17th IEEE International Conference on Nanotechnology (IEEE NANO)

publisher

  • IEEE

start page

  • 542

end page

  • 547