Analog Computing for Nonlinear Shock Tube PDE Models: Test and Measurement of CMOS Chip Article

Malavipathirana, Hasantha, Mandal, Soumyajit, Udayanga, Nilan et al. (2025). Analog Computing for Nonlinear Shock Tube PDE Models: Test and Measurement of CMOS Chip . IEEE ACCESS, 13 2862-2875. 10.1109/ACCESS.2024.3524500

Open Access

cited authors

  • Malavipathirana, Hasantha; Mandal, Soumyajit; Udayanga, Nilan; Wang, Yingying; Hariharan, SI; Madanayake, Arjuna

authors

publication date

  • January 1, 2025

published in

keywords

  • Accuracy
  • Acoustics
  • Analog computing
  • CMOS
  • Computer Science
  • Computer Science, Information Systems
  • Computer architecture
  • Delays
  • Electric shock
  • Engineering
  • Engineering, Electrical & Electronic
  • Finite difference methods
  • Gain
  • IMPLEMENTATION
  • Integrated circuit modeling
  • Mathematical models
  • Science & Technology
  • Technology
  • Telecommunications
  • Time-domain analysis
  • acceleration
  • finite-difference time domain (FDTD)
  • nonlinear
  • partial differential equations (PDEs)

Digital Object Identifier (DOI)

publisher

  • IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

start page

  • 2862

end page

  • 2875

volume

  • 13