Direct-RF Full Duplex Radio With 22-dB/200-MHz Digital Self-Interference Cancellation Conference

Ullah, K, Venkatakrishnan, SB, Volakis, JL. (2024). Direct-RF Full Duplex Radio With 22-dB/200-MHz Digital Self-Interference Cancellation . 322-323. 10.23919/USNC-URSINRSM60317.2024.10464677

cited authors

  • Ullah, K; Venkatakrishnan, SB; Volakis, JL

abstract

  • This paper presents a new full-duplex transceiver exhibiting wideband digital self-interference cancellation (DSIC). To achieve strong cancellation, a direct-RF sampling architecture is employed to significantly reduce the number of analog components in the transceiver chain. The entire transceiver is realized using a single field programmable gate array (FPGA) as part of a radio-frequency system-on-chip (RFSoC) development kit. This RFSoC integrates RF-sampling data converters, i.e., digital-to-analog converter (RF-DAC) and analog-to-digital converter (RF-ADC) along with the FPGA fabric on the same chip. The employed 5G OFDM waveform is synthesized on the XCZU28DR chip as part of the transceiver’s testbed. The efficacy of the proposed transceiver and the canceller algorithm is demonstrated using SI cancellation ratio (SICR) level. Hardware measurements demonstrated 22 dB of digital cancellation across a modulation bandwidth of 200 MHz. To the best of the author’s knowledge, this is the first-ever demonstration of a wideband radio self-interference cancellation at the digital back-end.

publication date

  • January 1, 2024

start page

  • 322

end page

  • 323