RFSoC-FPGA Realization of a Code-Multiplexed Digital Receiver (CMDR) Using 1-ADC/Quad-Channel Article

Ullah, Kefayet, Venkatakrishnan, Satheesh Bojja, Volakis, John L. (2024). RFSoC-FPGA Realization of a Code-Multiplexed Digital Receiver (CMDR) Using 1-ADC/Quad-Channel . 4(1), 123-138. 10.1109/JMW.2023.3320712

cited authors

  • Ullah, Kefayet; Venkatakrishnan, Satheesh Bojja; Volakis, John L

authors

publication date

  • January 1, 2024

keywords

  • ARCHITECTURE
  • Adjacent Channel Interference
  • Baseband
  • Code Domain Multiplexing
  • Codes
  • Digital Beamformer
  • Engineering
  • Engineering, Electrical & Electronic
  • FPGA
  • Frequency division multiplexing
  • Hardware
  • MIMO communication
  • MIMO systems
  • PHASED-ARRAYS
  • RF-SoC
  • RF-sampling ADC
  • RF-sampling DAC
  • Receivers
  • Science & Technology
  • Signal to noise ratio
  • Technology

Digital Object Identifier (DOI)

publisher

  • IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

start page

  • 123

end page

  • 138

volume

  • 4

issue

  • 1