BLOCK-PARALLEL SYSTOLIC-ARRAY ARCHITECTURE FOR 2-D NTT-BASED FRAGILE WATERMARK EMBEDDING Article

Madanayake, HLP Arjuna, Cintra, RJ, Dimitrov, VS et al. (2012). BLOCK-PARALLEL SYSTOLIC-ARRAY ARCHITECTURE FOR 2-D NTT-BASED FRAGILE WATERMARK EMBEDDING . 22(3), 10.1142/S0129626412500090

cited authors

  • Madanayake, HLP Arjuna; Cintra, RJ; Dimitrov, VS; Bruton, LT

authors

publication date

  • September 1, 2012

keywords

  • Computer Science
  • Computer Science, Interdisciplinary Applications
  • DISCRETE HARTLEY TRANSFORM
  • Fragile watermarking
  • Science & Technology
  • Technology
  • number-theoretic transforms

Digital Object Identifier (DOI)

publisher

  • WORLD SCIENTIFIC PUBL CO PTE LTD

volume

  • 22

issue

  • 3