0.2μm self-aligned T-gate InAlAs/InGaAs HIGFET's have been fabricated and investigated experimentally. The submicron gate technology is based on lift-off of sputtered WSix. Low gate leakage current and high gate/drain breakdown were obtained with the help of a T-gate structure which controls the lateral spreading of the source/drain implants. The peak extrinsic gm is 650 mS/mm and gds shows a low value of 35 mS/mm using a p-buffer design. The DC gain ratio (gm/gds) is much higher (approximately 18) with a p-buffer than with an undoped buffer approach where the ratio is only 4. The short-channel effects associated with substrate injection are also substantially reduced using the p-doped buffer design.
