VLSI architecture for 8-Point AI-based arai DCT having low area-time complexity and power at improved accuracy
Article
Edirisuriya, A, Madanayake, A, Dimitrov, VS et al. (2012). VLSI architecture for 8-Point AI-based arai DCT having low area-time complexity and power at improved accuracy
. 2(2), 127-142. 10.3390/jlpea2020127
Edirisuriya, A, Madanayake, A, Dimitrov, VS et al. (2012). VLSI architecture for 8-Point AI-based arai DCT having low area-time complexity and power at improved accuracy
. 2(2), 127-142. 10.3390/jlpea2020127