VLSI Computational Architectures for the Arithmetic Cosine Transform Article

Rajapaksha, Nilanka, Madanayake, Arjuna, Cintra, Renato J et al. (2015). VLSI Computational Architectures for the Arithmetic Cosine Transform . IEEE TRANSACTIONS ON COMPUTERS, 64(9), 2708-2715. 10.1109/TC.2014.2366732

Open Access International Collaboration

cited authors

  • Rajapaksha, Nilanka; Madanayake, Arjuna; Cintra, Renato J; Adikari, Jithra; Dimitrov, Vassil S

authors

publication date

  • September 1, 2015

published in

keywords

  • COMPRESSION
  • Computer Science
  • Computer Science, Hardware & Architecture
  • DCT
  • Discrete cosine transform
  • Engineering
  • Engineering, Electrical & Electronic
  • IMPLEMENTATION
  • SENSOR
  • Science & Technology
  • Technology
  • VLSI
  • arithmetic cosine transform
  • fast algorithms

Digital Object Identifier (DOI)

publisher

  • IEEE COMPUTER SOC

start page

  • 2708

end page

  • 2715

volume

  • 64

issue

  • 9