On the design and FPGA implementation of real-time scanned-array 2D frequency-planar beam filters
Conference
Madanayake, A, Bruton, L. (2015). On the design and FPGA implementation of real-time scanned-array 2D frequency-planar beam filters
. 06-10-September-2004 2011-2014.
Madanayake, A, Bruton, L. (2015). On the design and FPGA implementation of real-time scanned-array 2D frequency-planar beam filters
. 06-10-September-2004 2011-2014.
We propose a field programmable gate array (FPGA) circuit-based 2D IIR single-chip spatio-temporal filter having low hardware complexity for the purpose of processing 2D scanned-array sampled signals. The filter is suitable for the selective real-time filtering of broadband spatio-temporal plane waves by employing low-order highly-selective 2D frequency-planar beam-shaped filter passbands. The design and hardware co-simulation is described for a Xilinx FPGA chip. Employing a linear array of N sensors, temporal sampling rates up to f AS /N MHz per sensor are feasible using one A/D converter and a FPGA chip, clocked at f AS MHz. A directional audio example is given for CD quality propagating sound waves.
