Evaluation of low stress dielectrics for board application Conference

Brownlee, K, Shinotani, KI, Raj, PM et al. (2003). Evaluation of low stress dielectrics for board application . 136-141.

cited authors

  • Brownlee, K; Shinotani, KI; Raj, PM; Bhattacharya, SK; Wong, CP; Tummala, RR

abstract

  • The objective of this research is to evaluate and qualify low stress dielectric materials for multi-layer sequential build-up process. It is expected that a low CTE dielectric, such as Liquid Crystal Polymer (LCP), or a low modulus dielectric, such as ABSORBONDTM will reduce the dielectric film stress generated due to CTE mismatch between the substrate and the dielectric layer. These dielectrics were laminated onto 3 board samples: carbon cyanate ester, carbon epoxy, and double-treated FR4. Atomic Force Microscope (AFM) was used to determine the surface roughness of various boards. Peel strength measurement was performed to quantify the adhesion between the dielectric and the board. Test beds were assembled using PB8 flip chips for thermo-mechanical reliability assessment.

publication date

  • July 17, 2003

start page

  • 136

end page

  • 141