This paper describes a low-cost large area coating method for depositing thin film polymers on 12 in x 12 inch substrates for the Packaging Research Center's proposed System-on-Package (SOP) enabling technology. One of the building blocks of the SOP is a high density wiring substrate. The high wiring density, in turn, requires finer lines and vias in a multi-layer build-up process environment. Most Roadmaps project 6 to 8 micrometers lines and spaces for next generation high density PWB substrates in the year 2006 which would require coating thickness of similar magnitudes for manufacturing fine lines with higher yield. Meniscus coating can be an enabling deposition method that can provide finer yet uniform coating on large area substrates which translates to patterning finer copper traces, thereby increasing the wiring density. This paper reports preliminary results on coating thickness that can be achieved with photoresists, dielectrics, and soldermasks which are the integral parts of the sequential build up multi-layer process.
