Scaling Cu pillars to 20um pitch and below: critical role of surface finish and barrier layers Conference

Huang, Ting-Chia, Smet, Vanessa, Raj, Pulugurtha Markondeya et al. (2017). Scaling Cu pillars to 20um pitch and below: critical role of surface finish and barrier layers . 384-391. 10.1109/ECTC.2017.324

International Collaboration

cited authors

  • Huang, Ting-Chia; Smet, Vanessa; Raj, Pulugurtha Markondeya; Tummala, Rao; Tomic, Maja; Nichols, Rick; Ramos, Gustavo; Taylor, Robin

authors

date/time interval

  • May 30, 2017 -

publication date

  • January 1, 2017

keywords

  • Cu pillar interconnections
  • DIFFUSION
  • Engineering
  • Engineering, Electrical & Electronic
  • GOLD
  • SOLDER
  • Science & Technology
  • Technology
  • diffusion barrier layers
  • flip-chip thermo-compression
  • interfacial reactions
  • metastable SLID bonding
  • surface finish metallurgy

Location

  • FL, Lake Buena Vista

Digital Object Identifier (DOI)

Conference

  • IEEE 67th Electronic Components and Technology Conference (ECTC)

publisher

  • IEEE

start page

  • 384

end page

  • 391