Critical path based hardware acceleration for cryptosystems Article

Liu, C, Duarte, R, Granados, O et al. (2012). Critical path based hardware acceleration for cryptosystems . 4(1), 438-452. 10.4156/ijact.vol4.issue1.50

cited authors

  • Liu, C; Duarte, R; Granados, O; Tang, J; Liu, S; Andrian, J



  • Data security, energy consumption, and computation speed have all become crucial criteria in the new era of computing and communication technology. Cryptography plays an important role for data security and integrity and is widely adopted. On one hand, we want to reduce the computation overhead of cryptography algorithms; on the other hand, we also want to reduce the energy consumption associated with this computation overhead. In this paper we explore and present implementation techniques for energy-efficient hardware acceleration of RSA cryptography and Blowfish cryptography. Instead of implementing the entire algorithm into hardware format, we provide a system design that focus on accelerating the execution of the critical path of each of the cryptography algorithm, which is the most computation-intensive component. We carefully implement the critical path as a customized coprocessor to improve the overall system throughput on Virtex-5 Field- Programmable Gate Array (FGPA) platform. Subsequently, we make a comparison of the effectiveness and energy consumption between the pure software implementation of the cryptography algorithms and our proposed approach. The results show that our critical path enhancement design speeds up the execution of RSA by 11% and Blowfish by 58.8%; in the meantime, we are able to reduce the energy consumption by 9.6% for RSA and 36.0% for Blowfish, thus achieving our objective.

publication date

  • January 1, 2012

Digital Object Identifier (DOI)

start page

  • 438

end page

  • 452


  • 4


  • 1