A 117mW 77GHz receiver in 65nm CMOS with ladder structured tunable VCO Conference

Berenguer, R, Liu, G, Akhiyat, A et al. (2010). A 117mW 77GHz receiver in 65nm CMOS with ladder structured tunable VCO . 494-497. 10.1109/ESSCIRC.2010.5619751

cited authors

  • Berenguer, R; Liu, G; Akhiyat, A; Kamtikar, K; Xu, Y

abstract

  • A low power 77GHz receiver, suitable to be used in a FM-CW Automotive Radar has been designed using a 1P6M 65nm RFCMOS process. It has been implemented using a direct conversion architecture. The 77GHz signal generation block generates a FM-CW signal that pre-drives the external PA with a power level of -4.5dBm and also works as a Local Oscillator (LO) signal in the downconversion mixer. The ladder structured CPW differential transmission line used in the VCO core presents an inductance value of 83pH and a quality factor of 30 at 77GHz. By cutting the different ladders of the inductor, together with the implemented varactors, a tuning range of 15.8% is measured for the VCO, which is suitable to cover process variations. The front-end exhibits a maximum voltage gain of 15 dB over the baseband and presents a LNA noise figure of 7dB at 77GHz. The VCO measured phase noise is -109dBc/Hz at 10MHz. The achieved power consumption of the complete receiver is only 117mW from a 1.5V voltage supply, 43.5mW coming from the receiver block and 73.5mW from the signal generation block. ©2010 IEEE.

publication date

  • December 27, 2010

Digital Object Identifier (DOI)

start page

  • 494

end page

  • 497