Efficient Low-Density Parity-Check (LDPC) Code Decoding for Combating Asymmetric Errors in STT-RAM Conference

Li, Bohua, Pei, Yukui, Wen, Wujie. (2016). Efficient Low-Density Parity-Check (LDPC) Code Decoding for Combating Asymmetric Errors in STT-RAM . Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 266-271. 10.1109/ISVLSI.2016.9

International Collaboration

cited authors

  • Li, Bohua; Pei, Yukui; Wen, Wujie

authors

date/time interval

  • July 11, 2016 -

publication date

  • January 1, 2016

published in

keywords

  • Computer Science
  • Computer Science, Hardware & Architecture
  • DESIGN
  • Engineering
  • Engineering, Electrical & Electronic
  • PERFORMANCE
  • Science & Technology
  • Technology
  • asymmetric log-likelihood ratio (A-LLR)
  • channel model
  • low-density parity-check (LDPC) code
  • reliability
  • spin-transfer torque random access memory (STT-RAM)

Digital Object Identifier (DOI)

start page

  • 266

end page

  • 271