Automated Synthesis of Hardware Designs using Symbolic Feedback and Grammar-Constrained Decoding in Large Language Models Conference

Jha, Sumit Kumar, Jhat, Susmit, Rashedt, Muhammad Rashedul Haq et al. (2024). Automated Synthesis of Hardware Designs using Symbolic Feedback and Grammar-Constrained Decoding in Large Language Models . 95-100. 10.1109/NAECON61878.2024.10670630

cited authors

  • Jha, Sumit Kumar; Jhat, Susmit; Rashedt, Muhammad Rashedul Haq; Eweti, Rickard; Velasquez, Alvaro

authors

date/time interval

  • July 15, 2024 -

publication date

  • January 1, 2024

keywords

  • Engineering
  • Engineering, Aerospace
  • Engineering, Electrical & Electronic
  • LLM
  • Science & Technology
  • Technology
  • Verilog
  • automated synthesis
  • circuits
  • grammar-constrained decoding
  • hardware description language

Location

  • OH, Dayton

Digital Object Identifier (DOI)

International Standard Book Number (ISBN) 13

Conference

  • 76th Annual IEEE National Aerospace and Electronics Conference (NAECON)

publisher

  • IEEE

start page

  • 95

end page

  • 100