The design and implementation of a single-chip programmable 40-tap finite impulse response (FIR) filter in 0.9 μ CMOS technology is described. The chip is fabricated and tested at sample rates up to 100 MHz. It performs over 4 billion multiply-add operations (12 × 10 bit multiplications and 26-bit additions) per second in less than 22 mm2 of silicon area while dissipating about 3.1 W of power.
