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Architectures for fast modular multiplication
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Aris, A, Ors, B, Saldamli, G. (2011). Architectures for fast modular multiplication .
434-437. 10.1109/DSD.2011.60
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Aris, A, Ors, B, Saldamli, G. (2011). Architectures for fast modular multiplication .
434-437. 10.1109/DSD.2011.60
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cited authors
Aris, A; Ors, B; Saldamli, G
authors
Aris, Ahmet
abstract
Modular multiplication is the key ingredient needed to realize most public-key cryptographic primitives. In a modular setting, multiplications are carried in two steps: namely a usual integer arithmetic followed by a reduction step. Progress in any of these steps naturally improves the modular multiplication but it is not possible to interleave the best algorithms of these stages. In this study, we propose architectures for recently proposed method of interleaving the Karatsuba-Ofman multiplier and bipartite modular reduction on the upper most layer of Karatsuba-Ofman's recursion. We manage to come up with a high performance modular multiplication architecture by taking the advantage of a fast multiplication and a parallel reduction method." © 2011 IEEE.
publication date
November 1, 2011
Identifiers
Digital Object Identifier (DOI)
https://doi.org/10.1109/dsd.2011.60
International Standard Book Number (ISBN) 13
9780769544946
Additional Document Info
start page
434
end page
437