Compact parallel optical modified-signed-digit arithmetic-logic array processor with electron-trapping device Article

Li, GQ, Qian, F, Ruan, H et al. (1999). Compact parallel optical modified-signed-digit arithmetic-logic array processor with electron-trapping device . Applied Optics, 38(23), 5039-5045. 10.1364/AO.38.005039

International Collaboration

cited authors

  • Li, GQ; Qian, F; Ruan, H; Liu, LR

authors

publication date

  • August 10, 1999

published in

keywords

  • ADDER
  • ALGORITHM
  • CONTENT-ADDRESSABLE-MEMORY
  • IMPLEMENTATION
  • MULTIPLICATION
  • NEGABINARY
  • OPERATIONS
  • Optics
  • Physical Sciences
  • REPRESENTATION
  • SUBTRACTION
  • SYMBOLIC SUBSTITUTION
  • Science & Technology

Digital Object Identifier (DOI)

start page

  • 5039

end page

  • 5045

volume

  • 38

issue

  • 23