Florida International University
Edit Your Profile
FIU Discovery
Toggle navigation
Browse
Home
People
Organizations
Scholarly & Creative Works
Research Facilities
Support
Edit Your Profile
Power-Efficient and Highly Scalable Parallel Graph Sampling using FPGAs
Conference
Tariq, Usman, Cheema, Umer I, Saeed, Fahad. (2017). Power-Efficient and Highly Scalable Parallel Graph Sampling using FPGAs .
Share this citation
Twitter
Email
Tariq, Usman, Cheema, Umer I, Saeed, Fahad. (2017). Power-Efficient and Highly Scalable Parallel Graph Sampling using FPGAs .
Copy Citation
Share
Industry Collaboration
Overview
Research
Location
Additional Document Info
View All
Overview
cited authors
Tariq, Usman; Cheema, Umer I; Saeed, Fahad
authors
Saeed, Fahad
date/time interval
December 4, 2017 -
publication date
January 1, 2017
webpage
https://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000426529700039&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=e451fd656366bf1ec5554941920a9ccb
Research
keywords
ALGORITHM
COMMUNITIES
Computer Science
Computer Science, Hardware & Architecture
Engineering
Engineering, Electrical & Electronic
HIDDEN POPULATIONS
Science & Technology
Technology
Location
Location
Cancun, MEXICO
Additional Document Info
Conference
International Conference on Reconfigurable Computing and FPGAs (ReConFig)
publisher
IEEE